Dual-Junction LDD/HDD MOSFET Scaling
TCAD-based transistor scaling from 1μm to 0.18μm
Course: EE620 - Physics of Transistors
Instructor: Prof. Souvik Mohapatra
Duration: Mar - Apr 2025
- Scaled transistor from 1μm to 0.18μm gate length with halo implants for short-channel effect control
- Achieved Vₜₕ reduction from 1V to 0.85V and 100× Iₒₙ improvement, optimizing through TCAD simulations
- Used Hurkx BTBT tunneling and mobility degradation models to demonstrate DIBL control at 118 mV/V